Samsung Launches Semiconductor Packaging Task Force

Samsung Electronics has launched a semiconductor packaging task force (TF). Placed directly under the CEO, the team is intended to enhance cooperation with large foundry customers in the packaging field.

The company's DS Business Division formed the TF in the middle of June. The unit is placed directly under the head of the DS Business Division, CEO Kyung Kye-hyun.

This team was assembled with engineers from the Test & System Package (TSP) of the DS Division, researchers from the Semiconductor R&D Center, and officials from the company's memory and foundry divisions. The team is expected to come up with advanced packaging solutions that will enhance cooperation with clients.

Kyung’s move shows the importance that he attaches to advanced semiconductor packaging technologies. Packaging refers to cutting a wafer that has completed a front-end process into the shape of a semiconductor or wiring it. In the industry, it is also called a “back-end process.”

Today, as the work of miniaturizing circuits in the front-end process has reached its limits, the so-called “3D packaging” or “chiplet” technology, which connects chips and makes them operate as a single semiconductor, is attracting attention.

In particular, global semiconductor giants such as Intel and TSMC are investing aggressively in advanced packaging. Intel and TSMC accounted for 32 percent and 27 percent, respectively, of the global advanced packaging investment in 2022, according to data from market research firm Yole Development. Samsung Electronics came in fourth after ASE, a Taiwanese back-end process company.

Intel already introduced a 3D packaging brand called “Foveros” in 2018 and announced that it would apply this technology to various new products. It also devised a method of assembling each area that goes into products by making it like a tile. A chip called “Lakefield” released in 2020 was made in this way and installed in Samsung Electronics’ notebook PCs.

TSMC also recently decided to produce the latest product of AMD, its largest customer, by using this technology. Intel and TSMC were aggressive enough to create a 3D packaging research center in Japan and operate it beginning from June 24.

Samsung is also working hard in this market by unveiling 3D stacking technology “X-Cube” in 2020. Choi Si-young, president of Samsung Electronics’ Foundry Business Division, said that it was developing “3.5D packaging” at the Hot Chips 2021 in June last year. The semiconductor industry’s attention is zero in on whether this task force team at Samsung will be able to find a way to enable Samsung to secure a “super-wide gap” with its rivals in this field.



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